Legal First. Optimal Next.

There is a sentence the literature kept handing me, in three different papers, in almost the same words: the standard FPGA routing algorithm is intrinsically sequential. Inherently sequential. Fundamentally sequential. Three research groups, three decades of tooling, one verdict. The polite version of that verdict is that routing on a GPU is a fool’s errand. I read all three papers and started anyway, which tells you something about me that my wife already knew.

Here is what the fool’s errand looks like from the inside.

Routing is the dominant stage of FPGA compilation, and the reason it resists parallelism is almost funny once you see it. Route every net at once against a frozen picture of the chip and they all see the same congestion, so they all flee to the same alternatives, at the same time, and pile up there instead. The next round, they all flee together again. The literature never named this, so I did: herding. On my first serious design the herd flatlined at seventeen thousand violations while the sequential reference walked the identical problem calmly to zero. Seventeen thousand. Zero. Same netlist, same chip. That gap was my company for six weeks.

The tequila section

I keep a lab notebook with a section called labeled negatives. I think of dead ends as depth charges: you drop one into dark water and the detonation does not kill the truth, it lights it up for a second, and you steer by the flash. That section grew fat. I attacked the same latency wall five different ways in one stretch; four of those entries end with the word slower and a number. I built a clever thing that took a week and beat the old code by four percent. I built an obvious thing that took an afternoon and made everything worse in a way that taught me more than the clever thing did.

Some weeks the honest engineering summary was: a bottle of tequila dissolving a breadboard. Not rage. Something slower and more corrosive, the feeling of applying real effort to a surface that just softens and gives nothing back.

Two disciplines got me out, and neither one was a stroke of genius.

Discipline one: single-variable controls

The mechanism that ended up mattering most is one I can only gesture at here, because it is claimed in a filed patent application and I would rather the filing do its work than a blog post undo it. What I can show you is the control, because the control is the part that made me trust it.

Same engine. Same design. Same configuration. One flag.

With the flag off: 91.7 seconds of grinding, 36 nets stranded, not legal. With the flag on: fully legal in 1.57 seconds.

That is not a benchmark, that is an experiment. One variable, two outcomes, sixty-fold apart. When a system is as chaotic as parallel routing, opinions about what is helping are worthless. If you cannot turn your idea off and watch the system fail, you do not know your idea is the reason it succeeds.

Discipline two: interrogate the instance, not just the solver

The design that broke my heart for the better part of a month was a fifty-thousand-net benchmark that would get agonizingly close to legal and stall. I rewrote schedulers. I re-derived cost functions. I stared at the same four hundred stuck nets until I knew some of them by number.

Then I finally asked a question about the problem instead of the program: how much routing capacity does this design actually have to work with? The answer was zero. The instance had been generated at the exact minimum channel width where routing it is possible at all. No slack. I had spent a month benching against bedrock and blaming my form.

Regenerate the chip model with modest slack, run the identical router, and the residual evaporates. Fully legal, about twelve seconds, verified. The wall had a load rating the whole time and nobody had checked it, least of all me. When a solver stalls, suspect the instance with the same energy you suspect the solver. That lesson cost me a month and I am giving it to you for free.

The ladder

After that, the campaign became a ladder, and each rung was independently checked by a verifier that re-derives everything from the emitted routes. The router’s own opinion of itself is never trusted; if your solver grades its own homework you do not have results, you have hopes.

Four thousand nets: legal in half a second. Fifty thousand: legal in twelve. A hundred eighty-two thousand, a real Titan benchmark: legal, three runs out of three. And then the one I had privately labeled the monster: 799,403 nets, a routing graph of 13.7 million nodes, fully legal in 376.5 seconds, on the single 96 GB card sitting under my desk. Every connection present, zero capacity overuse, and the same answer every run, because a router that gives a different answer each time cannot sign off a chip.

I want to be plain about the reference tool, not coy about it: it is not just ahead of mine on the biggest designs, it is not close, and I print its numbers next to mine because it earned every one of them. VPR has been in the hands of dozens of research teams for the better part of thirty years, PathFinder in 1995 through nine major releases since, each one squeezing out runtime and wirelength that the last release left on the table. My engine is generation one, built by one person, and it had a single target: the property the field said could not be had at all, legal routing on a GPU, with the parallelism itself doing the work instead of fighting it. Legal first. Optimal next. Optimizing a router that does not yet finish is a wasted afternoon; optimizing one that already finishes, every time, is just the next six weeks. That is the bet: an engine that starts from “it works” is a much better place to build from than where I was standing in May.

What travels

If you build solvers, or anything that fights back, four things from these six weeks outlast my router:

Controls over vibes. One variable, on and off, or you know nothing.
Independent verification, always. Re-derive the result from the artifact. The system’s self-report is marketing.
Interrogate the instance. Sometimes the problem is impossible at the size you were handed, and no amount of solver genius fixes a wall with a zero load rating.
Label your negatives. Dead ends are depth charges; every detonation lights the water, and the four failed attacks aimed the fifth. A notebook of only wins is a notebook of lies.

The mechanisms are in U.S. Patent Application No. 19/731,882 now, filed this month, doing their quiet work. The technical brief, with every number in this post and the ones I left out, is coming to the Voxell site. The field said intrinsically sequential. The card under my desk says 376.5 seconds.

One of us has receipts.

Jonathan Corners · Founder, Voxell Inc. voxell.ai · sentimark.ai

Verify what’s in this post:

The mi-go product page
U.S. Patent Application No. 19/731,882
The Titan benchmark suite and the reference router (VPR/VTR) are public; the designs named here are standard.